Timothy O. Dickson, Zeynep Toprak Deniz, et al.
IEEE JSSC
A -3.3-V half-rate clock 4:1 multiplexer implemented in a 210-GHz f T 0.13-μm SiGe-bipolar technology and operating up to 132 Gb/s is reported. Among many design challenges, the control of on-chop clock distribution was critical to achieve such a high data rate. At 100 Gb/s, the chip operates reliably down to -3.0-V supply voltage and up to 100°C chip temperature. The circuit consumes 1.45 W from a -3.3-V supply voltage and exhibits less than 340-fs rms jitter on the output data.
Timothy O. Dickson, Zeynep Toprak Deniz, et al.
IEEE JSSC
Philippe André, Jean-Louis Benchimol, et al.
IEEE Journal of Solid-State Circuits
Gautam R. Gangasani, John F. Bulzacchelli, et al.
A-SSCC 2013
Gautam R. Gangasani, Chun-Ming Hsu, et al.
IEEE JSSC