Conference paper
A 1.2 ns/1 ns 1 K∗16 ECL dual-port cache RAM
Hyun J. Shin, P.F. Lu, et al.
ISSCC 1993
A monolithically-integrated, low-bias, shortwave silicon photodetector and high-speed CMOS preamplifier in a standard VLSI BiCMOS technology with no process modifications is described. The integrated photodetector/preamplifier operates up to 531 Mb/s using a 850-nm wavelength laser source at a measured sensitivity of-14.8 dBm, while dissipating only 66 mW from a single +3.3-V supply. A measured output eye-diagram using an 850-nm wavelength laser source modulated with a 531-Mb/s, 27-1 pseudorandom-bit-sequence input is shown. The bit-error-rate at 531 Mb/s and at 266 Mb/s is plotted as a function of average optical input power.
Hyun J. Shin, P.F. Lu, et al.
ISSCC 1993
M. Soyuer, H. Ainspan
ISSCC 1993