H.J. Yu, Mark H. Kryder, et al.
IEEE Transactions on Magnetics
All the functions essential for the operation of a memory (viz., storage, access, write, read, and detection) can be performed within a bubble-domain memory chip. This enables the design of a memory with a minimum number of peripheral circuits and interconnections, and a short access time. It is conceivable to achieve a 106 -bit memory with fewer than 20 circuits (and interconnections), and with a few hundreds of microseconds access time. The present paper describes the devices required to implement such a memory, experimental data to demonstrate the operability of such devices, and the design criteria. Copyright © 1972 by The Institute of Electrical and Electronics Engineers, Inc.
H.J. Yu, Mark H. Kryder, et al.
IEEE Transactions on Magnetics
Hsu Chang
National Computer Conference AFIPS 1974
Hsu Chang
Journal of Applied Physics
Nobuo Hayashi, Lubomyr T. Romankiw, et al.
IEEE Transactions on Magnetics