Competing high-speed/high-density technologies
L.M. Terman
ISSCC 1978
A two-stage weighted capacitor network for A/D and D/A conversion utilizing a feedback amplifier is described. The two-stage weighted capacitor DAC requires a smaller range of capacitor values than the conventional weighted capacitor DAC and is not subject to the nonlinear effects of parasitic capacitance. Experimental results of such a DAC implemented using a conventional n-channel metal-gate MOS process are presented. A discussion of the comparative accuracy and area of one-and two-stage weighted capacitor DAC's on the basis of capacitor tracking is given. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.
L.M. Terman
ISSCC 1978
A. Deutsch, G.V. Kopcsay, et al.
ECTC 1997
L.M. Terman, L.G. Heller
IEEE T-ED
L.M. Terman
ICSICT 1995