William Hinsberg, Joy Cheng, et al.
SPIE Advanced Lithography 2010
The introduction and advancement of strain engineering has been one of the most critical features for the state-of-the-art nanoscale CMOS transistors. This paper provides an overview of the major strain engineering techniques that have remarkably re-shaped the advanced CMOS transistor architecture, including embedded SiGe (eSiGe), embedded Si (eSi), stress memorization technique (SMT), dual stress liners (DSL), and stress proximity technique (SPT). The advent of high-K/metal-gate (HKMG) also brings in additional strain benefit with its metal gate stressor (MGS) and replacement gate (RMG) process. Strain engineering continues to evolve and will remain to be one of the key performance enablers for the future generation of CMOS technologies. © Science China Press and Springer-Verlag Berlin Heidelberg 2011.
William Hinsberg, Joy Cheng, et al.
SPIE Advanced Lithography 2010
Eric Price, David P. Woodruff
FOCS 2011
Sabine Deligne, Ellen Eide, et al.
INTERSPEECH - Eurospeech 2001
David S. Kung
DAC 1998