Low temperature 12 ns DRAM
W.H. Henkels, N.C.-C. Lu, et al.
VLSI-TSA 1989
We have fabricated and successfully operated NDRO memory cells designed with Nb edge-junction interferometers. To our knowledge this represents the first experimental circuits operated with edge-junction devices. The design was mapped from a design for lead-alloy devices. The cell occupies an area of 60µmx60µm. In conjunction with the memory cell investigation we designed and tested several individual edge-junction gates. These included several geometries of write gates and sense gates (undamped), and several damped gates, which could be used in the peripheral circuitry of a memory. We have found close agreement between our experimental results and the theoretical models, similar to that found previously for planar-junction gates. © 1983 IEEE
W.H. Henkels, N.C.-C. Lu, et al.
VLSI-TSA 1989
W.H. Henkels
IEEE Transactions on Magnetics
Nicky C.C. Lu, Hu H. Chao, et al.
IEEE Journal of Solid-State Circuits
T.V. Rajeevakumar, Nicky C. C. Lu, et al.
IEEE Electron Device Letters