Hierarchical shuffle-exchange and de Bruijn networks
Robert Cypher, Jorge L.C. Sanz
SPDP 1992
In the previous paper, we established the theoretical foundations of a new class of area-efficient architectures for the Viterbi algorithm. In this paper, we will show area-efficient architectures for practical codes to illustrate the design procedures and demonstrate the favorable area-time tradeoff results. Three examples from convolutional codes, matched-spectral-null (MSN) trellis codes, and Ungerboeck codes will be presented. We will also discuss the application of our area-efficient techniques to codes with a very large numbers of states, codes with time-varying trellises, and a programmable Viterbi decoder. © 1993 IEEE.
Robert Cypher, Jorge L.C. Sanz
SPDP 1992
Jehoshua Bruck, Robert Cypher, et al.
SIAM Journal on Computing
Vasanth Bala, Jehoshua Bruck, et al.
Parallel Computing
Robert Cypher, C.Bernard Shung
Journal of VLSI Signal Processing