Y.Y. Li, K.S. Leung, et al.
J Combin Optim
The process integration issues and the aspects of CMOS and bipolar transistor optimization in BiCMOS technology are reviewed in this article. In one section, a sample BiCMOS fabrication process is discussed to provide an entry to the subject for readers who are not familiar with the details and the nomenclature of semiconductor technology. The remainder of the paper deals with questions related to state-of-the-art BiCMOS and addresses new directions in BiCMOS processing. The convergence of the structural requirements for the bipolar and CMOS devices with miniaturization and the modular concepts of current BiCMOS are described and highlighted by various examples. The prospects of BiCMOS in the fast evolving broadband and wireless communications markets are addressed.
Y.Y. Li, K.S. Leung, et al.
J Combin Optim
Elizabeth A. Sholler, Frederick M. Meyer, et al.
SPIE AeroSense 1997
Moutaz Fakhry, Yuri Granik, et al.
SPIE Photomask Technology + EUV Lithography 2011
Fausto Bernardini, Holly Rushmeier
Proceedings of SPIE - The International Society for Optical Engineering