Thomas R. Puzak, A. Hartstein, et al.
CF 2007
The high-speed cache memory acts as a buffer between main memory and the central processing unit (CPU). Cache design, a direct-mapped cache and a fully associative cache and its implementation can make or break the performance (cache size, associativity, line size, physical versus virtual, and degree of asynchrony) of a computer systems. Accordingly, a higher level of associativity is better with respect to caches and physically addressed caches are better for environments where context switching is very frequent. In designing or tuning a CPU intensive application, it is advisable to maximize locality and avoid memory-access sequences that increase by large powers of 2.
Thomas R. Puzak, A. Hartstein, et al.
CF 2007
Liqun Chen, Matthias Enzmann, et al.
FC 2005
Preeti Malakar, Thomas George, et al.
SC 2012
Marshall W. Bern, Howard J. Karloff, et al.
Theoretical Computer Science