Conference paper
Representative traces for processor models with infinite cache
V.S. Iyengar, Louise Trevillyan, et al.
HPCA 1996
The present methodology for designing state-of-the-art microprocessors involves modeling at various levels of abstraction. Currently, there is a need for better integration between the modeling and validation methodologies. In this report, an account is given on some of the innovative leading-edge technologies in academia and industry.
V.S. Iyengar, Louise Trevillyan, et al.
HPCA 1996
Pradip Bose
ICCAD 1987
Pradip Bose
VTS 1998
A.-T. Nguyen, J.-D. Wellman, et al.
HPCC 1997