Chi-Leung Wong, Zehra Sura, et al.
I-SPAN 2002
The rise of Java, C#, and other explicitly parallel languages has increased the importance of compiling for different software memory models. This paper describes co-operating escape, thread structure, and delay set analyses that enable high performance for sequentially consistent programs. We compare the performance of a set of Java programs compiled for sequential consistency (SC) with the performance of the same programs compiled for weak consistency. For SC, we observe a slowdown of 10% on average for an architecture based on the Intel Xeon processor, and 26% on average for an architecture based on the IBM Power3. Copyright 2005 ACM.
Chi-Leung Wong, Zehra Sura, et al.
I-SPAN 2002
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PMBS 2016
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ICRC 2017
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TPS-ISA 2020