G.N. Parsons, J.H. Souk, et al.
Journal of Applied Physics
Amorphous silicon thin-film transistors (TFT's), in a top-gate staggered electrode structure, have been prepared using selectively deposited doped silicon contact layers, formed in-situ by plasma-enhanced chemical vapor deposition (PECVD). Selective deposition reduces the number of processing steps and assures the formation of low-resistance contacts. Devices fabricated with two photomasks and one plasma deposition step show saturation and linear mobilities as high as 1.1 and 0.9 cm2/V s, respectively, with threshold voltages between 3 and 6 V. On/off ratios are ≥ 106, with a subthreshold slope of 0.8 V/decade. The mobilities are at least a factor of 2 higher than previously reported for top-gate structures, and are similar to values reported for bottom-gate (inverted staggered) TFT's. © 1992 IEEE
G.N. Parsons, J.H. Souk, et al.
Journal of Applied Physics
J.H. Souk, G.N. Parsons
MRS Spring Meeting 1994
G.N. Parsons
Applied Physics Letters
G.N. Parsons, J.J. Boland, et al.
Symposium on Dynamics in Small Confining Systems 1992