Optimization algorithms for energy-efficient data centers
Hendrik F. Hamann
InterPACK 2013
Advanced molecular nanotechnology devices are predicted to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS devices. We describe and evaluate the Recursive NanoBox Processor Grid as an application specific, fault-tolerant, parallel computing system designed for fabrication with unreliable nanotechnology devices. In this study we construct hardware description language models of a NanoBox Processor cell and evaluate the effectiveness of our recursive fault masking approach in the presence of random errors. Our analysis shows that complex circuits constructed with encoded lookup tables can operate correctly despite 2% of the nodes being in error. The circuits operate partially correct with up to 4% of the nodes being in error. © 2006 IEEE.
Hendrik F. Hamann
InterPACK 2013
Maciel Zortea, Miguel Paredes, et al.
IGARSS 2021
Khaled A.S. Abdel-Ghaffar
IEEE Trans. Inf. Theory
Lerong Cheng, Jinjun Xiong, et al.
ASP-DAC 2008