Conference paper
FPGA-based coprocessor for text string extraction
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
György E. Révész
Theoretical Computer Science
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IGARSS 2021
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CF 2007