Optimizing pipelines for power and performance
Viji Srinivasan, David Brooks, et al.
MICRO 2002
Application-specific processors offer an attractive option in the design of embedded systems by providing high performance for a specific application domain. In this work, we describe the use of a reconfigurable processor core based on an RISC architecture as starting point for application-specific processor design. By using a common base instruction set, development cost can be reduced and design space exploration is focused on the application-specific aspects of performance. An important aspect of deploying any new architecture is verification which usually requires lengthy software simulation of a design model. We show how hardware emulation based on programmable logic can be integrated into the hardware/software codesign flow. While previously hardware emulation required massive investment in design effort and special purpose emulators, an emulation approach based on high-density field-programmable gate array (FPGA) devices now make hardware emulation practical and cost effective for embedded processor designs. To reduce development cost and avoid duplication of design effort, FPGA prototypes and ASIC implementations are derived from a common source. We show how to perform targeted optimizations to fully exploit the capabilities of the target technology while maintaining a common source base.
Viji Srinivasan, David Brooks, et al.
MICRO 2002
Valentina Salapura, Karthik Ganesan, et al.
ISPASS 2008
Valentina Salapura, Richard Harper
CLOUD 2015
Alexandre E. Eichenberger, Kathryn O'Brien, et al.
PACT 2005