Bart Kuyken, Xiaoping Liu, et al.
GFP 2011
The performance of a receiver based on a CMOS amplifier circuit designed with 90nm ground rules wire-bonded to a waveguide germanium photodetector is characterized at data rates up to 40Gbps. Both chips were fabricated through the IBM Silicon CMOS Integrated Nanophotonics process on specialty photonics-enabled SOI wafers. At the data rate of 28Gbps which is relevant to the new generation of optical interconnects, a sensitivity of -7.3dBm average optical power is demonstrated with 3.4pJ/bit power-efficiency and 0.6UI horizontal eye opening at a bit-error-rate of 10-12. The receiver operates error-free (biterror-rate < 10-12) up to 40Gbps with optimized power supply settings demonstrating an energy efficiency of 1.4pJ/bit and 4pJ/bit at data rates of 32Gbps and 40Gbps, respectively, with an average optical power of -0.8dBm. © 2012 Optical Society of America.
Bart Kuyken, Xiaoping Liu, et al.
GFP 2011
Yurii A. Vlasov, Fengnian Xia, et al.
QELS 2008
Fuad E. Doany, Benjamin G. Lee, et al.
Journal of Lightwave Technology
Solomon Assefa, Steven Shank, et al.
OECC/PS 2013