FPGA-based coprocessor for text string extraction
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
In this paper, we describe the key performance enhancements in IBM POWER7® microarchitecture and its memory hierarchy, including performance modeling and verification methodology. We also describe the performance characteristics of server applications, including Standard Performance Evaluation Corporation (SPEC) central processing unit, SAP Sales and Distribution, SPECjbb, online transaction processing workloads, and high-performance computing applications running on POWER7 processor-based systems compared with other systems. © 2011 by International Business Machines Corporation.
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
M.J. Slattery, Joan L. Mitchell
IBM J. Res. Dev
Raymond Wu, Jie Lu
ITA Conference 2007
G. Ramalingam
Theoretical Computer Science