PaperOverlay as the key to drive wafer scale 3D integrationSteven E. Steen, Douglas LaTulipe, et al.Microelectronic Engineering
PaperUsing Cryogenic CMOS Control Electronics to Enable a Two-Qubit Cross-Resonance GateDevin Underwood, Joseph A. Glick, et al.PRX Quantum
PaperMeeting the challenge of multiple threshold voltages in highly scaled undoped FinFETsRamachandran Muralidhar, Jin Cai, et al.IEEE T-ED
Conference paperSupply voltage strategies for minimizing the power of CMOS processorsJin Cai, Yuan Taur, et al.VLSI Technology 2002
