Chidanand Apté, Fred Damerau, et al.
ACM Transactions on Information Systems (TOIS)
Reduced power dissipation relative to the field-effect transistor (FET) is a key attribute that should be possessed by any device that has a chance of supplanting the FET as the ubiquitous building block for complex digital logic. We outline the possible physical approaches to achieving this attribute, and illustrate these approaches by citing current exploratory device research. We assess the value of the key exploratory research objectives of the semiconductor industry-sponsored Nanoelectronics Research Initiative (NRI) in the light of this pressing need to reduce dissipation in future digital logic devices. © 2006 IEEE.
Chidanand Apté, Fred Damerau, et al.
ACM Transactions on Information Systems (TOIS)
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IEEE Communications Magazine
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SSST 2008
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ACM/IEEE SC 2006