Rik Jongerius, Andreea Anghel, et al.
IEEE TC
The design of an energy-efficient memory subsystem is one of the key issues that system architects face today. To achieve this goal, architects usually rely on system simulators and trace-based DRAM power models. However, their long execution time makes the approach infeasible for the design-space exploration of next-generation exascale computing systems. Analytic models, in contrast, are orders of magnitude faster. In this paper, we propose a new analytic memory-scheduler-agnostic power model for DRAM, henceforth referred to as MeSAP. Similarly to state-of-the-art trace-based approaches, our analytic model achieves an average error of 20%, while being an order of magnitude faster. Furthermore, we integrate MeSAP into an analytic performance model of general-purpose processors and show its applicability to the design of a computing system targeting scientific image processing applications.
Rik Jongerius, Andreea Anghel, et al.
IEEE TC
Giovanni Mariani, Andreea Anghel, et al.
CF 2015
Leandro Fiorin, Rik Jongerius, et al.
IEEE TPDS
Erik Vermij, Christoph Hagleitner, et al.
CF 2016