Conference paper
Issues in multi-level cache designs
Lishing Liu
ICCD 1994
Traditional approaches for increasing TLB hit ratios include using more TLB entries and/or bigger page sizes. These techniques are often subject to significant costs in implementations. In this paper we illustrate techniques for improving TLB efficiency with less expensive hardware. The basic idea is to allow multiple pages translated upon each invocation of translation through page table. The proposal can improve TLB hit ratios with reasonable amount of hardware while transparent to the software. Trade-offs in using multiple page translations are illustrated through simulation results
Lishing Liu
ICCD 1994
Honesty C. Young, E. Shekita
ICCD 1993