Conference paper
A 19gb/s 38mW 1-tap speculative DFE receiver in 90nm CMOS
Didem Z. Turker, Alexander Rylyakov, et al.
VLSI Circuits 2009
This article describes a set of on-chip testing techniques and their application to integrated wireless RF transceivers. The objective is to reduce final product cost and accelerate time to market by providing means of testing the entire transceiver system as well as its major building blocks without using off-chip analog or RF instrumentation. On-chip test devices fabricated in a standard CMOS process and experimentally evaluated support the proposed test strategy. © 2006 IEEE.
Didem Z. Turker, Alexander Rylyakov, et al.
VLSI Circuits 2009
Bodhisatwa Sadhu, Mark Ferriss, et al.
IEEE JSSC
Wooram Lee, Alberto Valdes-Garcia
IEEE T-MTT
Keith A. Jenkins, Yu-Ming Lin, et al.
ECS Transactions