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This paper covers the recent developments of high speed, t 100Gb/s, VCSELs and VCSEL-based transceivers that are designed for co-packaging on a first level package with ASICs, such as CPUs, GPUs, and data center switches.
Pavel Klavík, A. Cristiano I. Malossi, et al.
Philos. Trans. R. Soc. A
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NeurIPS 2023
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Journal of the ACM