New latency bounds for atomic broadcast
Ray Strong, D. Dolev, et al.
RTSS 1990
As real-time applications become more demanding, multiprocessors are being called upon to meet their increasingly stringent requirements. A simple but efficient architecture for building multiprocessors is to connect several processors to a common backplane bus. The backplane acts as a shared resource in this architecture and contention for its use by different bus modules must be resolved. In a real-time system, this backplane must also provide scheduling support such that the timing behavior of the resulting system is analyzable. In addition, the support primitives for real-time scheduling on a backplane bus must also be constrained by the economic considerations associated with a bus standard that is intended to support both time sharing and real-time applications. In this paper, we review the design considerations to support realtime systems in the IEEE Futurebus+ backplane specification and describe how this backplane can be used to satisfy timing constraints in priority-driven realtime systems. © 1990 IEEE.
Ray Strong, D. Dolev, et al.
RTSS 1990
Lui Sha, Ragunathan Rajkumar, et al.
IEEE TC
Sitaram C.V. Raju, Ragunathan Rajkumar, et al.
RTSS 1992
Hongwei Wang, Yunlong Gao, et al.
ACM Transactions on Cyber-Physical Systems