Manjul Bhushan, Mark B. Ketchen, et al.
IEEE Trans Semicond Manuf
A test structure suite to measure circuit delays, power, and operating margins of single flux quantum (SFQ) circuits and to derive key parameters directly from dc testable high-speed circuits is described. This suite comprises a set of ring oscillators and a time-differential experiment as well as isolated circuit components. Measured data are compared to the results obtained from circuit simulations conducted in a design environment used for more complex chip designs. This approach, which enables tracking of process technology and validation of device and circuit models in a self-consistent manner, is inspired by a similar methodology for silicon technology deployed successfully by IBM and its alliance partners.
Manjul Bhushan, Mark B. Ketchen, et al.
IEEE Trans Semicond Manuf
Manjul Bhushan, Anne Gattiker, et al.
IEEE Trans Semicond Manuf
Dale J. Pearson, Mark B. Ketchen, et al.
IEEE International SOI Conference 2004
David J. Frank, Sudipto Chakraborty, et al.
ISSCC 2022