SOI technology outlook for Sub-0.25 μm CMOS, challenges and opportunities

Bijan Davari; Ghavam G. Shahidi

ESSDERC 1993

Conference paper

13 Sep 1993

SOI technology outlook for Sub-0.25 μm CMOS, challenges and opportunities

Abstract

In this paper, the outlook for the SOI technology in the sub-0.25 μm CMOS regime is discussed. The key challenges and opportunities for the SOI technology on the road to becoming a main stream semiconductor technology are presented.

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Abstract

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