Raphael Polig, Kubilay Atasu, et al.
FPL 2016
Big data workloads assumed recently a relevant importance in many business and scientific applications. Sorting ele-ments efficiently in big data workloads is a key operation. In this work, we analyze the implementation of the mergesort algorithm on heterogeneous systems composed of CPUs and near-data processors located on the system memory channels. For configurations with equal number of active CPU cores and near-data processors, our experiments show a per-formance speedup of up to 2.5, as well as up to 2.5× energy-per-solution reduction.
Raphael Polig, Kubilay Atasu, et al.
FPL 2016
Rik Jongerius, Andreea Anghel, et al.
IEEE TC
Jan Van Lunteren, Ronald Luijten, et al.
DATE 2019
Gagandeep Singh, Dionysios Diamantopoulos, et al.
FPL 2020