Zhibin Ren, Jin Cai, et al.
CSTIC 2011
The modulation of the currents in a symmetric Semiconductor-on-Insulator (SOI) lateral bipolar transistor with a voltage applied to the SOI substrate is studied. For an n-p-n transistor, a positive substrate bias could greatly increase the collector current, especially at low values, while having relatively little effect on the base current. Similarly, a negative substrate bias could greatly increase the collector current of a p-n-p transistor. The physical mechanisms responsible for the modulation effects are discussed. The potential of using substrate bias to enhance the performance of symmetric SOI lateral bipolar circuits is briefly discussed.
Zhibin Ren, Jin Cai, et al.
CSTIC 2011
Jeng-Bang Yau, Jin Cai, et al.
IEEE J-EDS
J. Cai, Tak H. Ning, et al.
S3S 2013
Jeng-Bang Yau, Jin Cai, et al.
VLSI-TSA 2009