Statistical-aware designs for the nm era
Rajiv Joshi, Rouwaida Kanj
ICICDT 2009
Device mismatch and process variation models play a key role in determining the functionality and yield of sub-100nm design. Average characteristics are often of interest, such as the average leakage current or the average read delay. However, detecting rare functional fails is critical for memory design and designers often seek techniques that enable accurately modeling such events. Extremely leaky devices can inflict functionality fails. The plurality of leaky devices on a bitline increase the dimensionality of the yield estimation problem. Simplified models are possible by adopting approximations to the underlying sum of lognormals. The implications of such approximations on tail probabilities may in turn bias the yield estimate. We review different closed form approximations and compare against the CDF matching method, which is shown to be most effective method for accurate statistical leakage modeling. © 2011 Rouwaida Kanj et al.
Rajiv Joshi, Rouwaida Kanj
ICICDT 2009
Zhong Guan, Malgorzata Marek-Sadowska, et al.
IITC/AMC 2014
Rajiv Joshi, Rouwaida Kanj, et al.
IEEE Design and Test of Computers
Antonio R. Pelella, Rajiv Joshi, et al.
IEEE International SOI Conference 2008