Wen-Hsing Chang, Bijan Davari, et al.
IEEE T-ED
The turn-on delay time of the vertical parasitic bipolar device of a CMOS transistor after the application of a latch-up triggering signal to forward bias the n+ source junction was studied. We found that the delay time for the device on an epitaxial CMOS transistor is in the order of a few nanoseconds, which is much shorter than that on a nonepitaxial CMOS transistor. Copyright © 1987 by The Institute of Electrical and Electronics, Inc.
Wen-Hsing Chang, Bijan Davari, et al.
IEEE T-ED
G. Shahidi, B. Bucclot, et al.
VLSI Technology 1992
H.I. Hanafi, M.R. Wordeman, et al.
ESSDERC 1987
Bijan Davari, Wen-Hsing Chang, et al.
IEEE T-ED