Daniel Brand
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Paper
Verification of HDLC
Abstract
A version of the standard high level data link control protocol has been verified as an experiment with an automated verification system. This paper tries to answer questions such as: How can HDLC and its properties be represented? To what extent can they be proved? What are the main obstacles in verifying protocols like HDLC. Copyright © 1982 by The Institute of Electrical and Electronics Engineers, Inc.
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Training deep neural networks with 8-bit floating point numbers
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Daniel Brand, Vijay S. Iyengar
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A new look at logic synthesis
John A. Darringer, William H. Joyner
DAC 1980