Conference paper
Verification of transactional memory in POWER8
Allon Adir, Dave Goodman, et al.
DAC 2014
In a modern chip development cycle non-mainline / non- functional verication is gaining importance compared to traditional functional vercation tasks and takes up to one third of the total verication effort. The purpose of non- mainline logic is to operate, maintain, and debug the chip. Ever-increasing complexity of the chip, thus, directly affects the complexity of the non-mainline logic and as a result, the verication thereof. Moreover, the non-mainline world is no longer pure hardware, but an intricate mix of software and hardware. Copyright 2014 ACM.
Allon Adir, Dave Goodman, et al.
DAC 2014
Erich P. Stuntebeck, John S. Davis II, et al.
HotMobile 2008
Raymond Wu, Jie Lu
ITA Conference 2007
Pradip Bose
VTS 1998