Sub-μm, planarized, Nb-AlOx-Nb Josephson process for 125 mm wafers developed in partnership with Si technologyM.B. KetchenD.J. Pearsonet al.1991Applied Physics Letters
Gel resist processing for submicron CMOS and bipolar circuitsK.E. PetrilloM. Smythet al.1989Proceedings of SPIE 1989
PICOSECOND ELECTRICAL PULSES FOR VLSI ELECTRONICS CHARACTERIZATION.J.-M. HalboutP.G. Mayet al.1986TMPEO 1986