Experimental measurement of a novel power gating structure with intermediate power saving mode
- Suhwan Kim
- Stephen V. Kosonocky
- et al.
- 2004
- ISLPED 2004
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31 results for Stephen Kosonocky
Characterization of logic circuit techniques for high leakage CMOS technologies
- Phillip Chin
- Charles A. Zukowski
- et al.
- 2004
- GLSVLSI 2004
Minimizing inductive noise in system-on-a-chip with multiple power gating structures
- Suhwan Kim
- Stephen V. Kosonocky
- et al.
- 2003
- ESSCIRC 2003
A Pico-Joule Class, 1 GHz, 32 KByte × 64b DSP SRAM with Self Reverse Bias
- Azeez J. Bhavnagarwala
- Stephen V. Kosonocky
- et al.
- 2003
- VLSI Circuits 2003
Understanding and minimizing ground bounce during mode transition of power gating structures
- S. Kim
- S.V. Kosonocky
- et al.
- 2003
- ISLPED 2003
Understanding and Minimizing Ground Bounce During Mode Transition of Power Gating Structures
- Suhwan Kim
- Stephen V. Kosonocky
- et al.
- 2003
- ISLPED 2003
Long-term power minimization of dual-νΤ CMOS circuits
- Suhwan Kim
- Youngsoo Shin
- et al.
- 2002
- ASIC/SOC 2002
Low power integrated scan-retention mechanism
- Victor Zyuban
- Stephen V. Kosonocky
- 2002
- LPED 2002
Supply voltage strategies for minimizing the power of CMOS processors
- Jin Cai
- Yuan Taur
- et al.
- 2002
- VLSI Technology 2002
Interconnect-centric array architectures for minimum SRAM access time
- A.J. Bhavnagarwala
- S.V. Kosonocky
- et al.
- 2001
- ICCD 2001