Capacitance investigation of diode and GGNMOS for ESD protection of high frequency circuits in 45nm SOI CMOS technologiesJunjun LiSouvick Mitraet al.2008EOS/ESD 2008
Analysis of failure mechanism on gate-silicided and gate-non-silicided, drain/source silicide-blocked ESD NMOSFETs in a 65nm bulk CMOS technologyJunjun LiDavid Alvarezet al.2006IPFA 2006