Technologies for exascale systems
- Paul Coteus
- John Knickerbocker
- et al.
- 2011
- IBM J. Res. Dev
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78 results for John Knickerbocker
Development of vacuum underfill technology for a 3D chip stack
- Katsuyuki Sakuma
- Sayuri Kohara
- et al.
- 2011
- JMM
3D chip-stacking technology with through-silicon vias and low-volume lead free interconnections
- Katsuyuki Sakuma
- Paul S. Andry
- et al.
- 2008
- IBM J. Res. Dev
Thermomechanical modeling of 3D electronic packages
- Sri M. Sri-Jayantha
- Gerard McVicker
- et al.
- 2008
- IBM J. Res. Dev
Three-dimensional silicon integration
- John U. Knickerbocker
- Paul S. Andry
- et al.
- 2008
- IBM J. Res. Dev
3D chip stacking with C4 technology
- Bing Dang
- Steven L. Wright
- et al.
- 2008
- IBM J. Res. Dev
3-D silicon integration and silicon packaging technology using silicon through-vias
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2006
- IEEE Journal of Solid-State Circuits
Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection
- John U. Knickerbocker
- Paul S. Andry
- et al.
- 2005
- IBM J. Res. Dev