A fully-integrated switched-capacitor 2:1 Voltage converter with regulation capability and 90% efficiency at 2.3A/mm2
- Leland Chang
- Robert K. Montoye
- et al.
- 2010
- VLSI Circuits 2010
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80 results for Robert Dennard
FDSOI CMOS with dielectrically-isolated back gates and 30nm LG high-κ/metal gate
- Marwan Khater
- J. Cai
- et al.
- 2010
- VLSI Technology 2010
FDSOI CMOS with dual backgate control for performance and power modulation
- Jeng-Bang Yau
- Jin Cai
- et al.
- 2009
- VLSI-TSA 2009
35nm SOI-CMOS for sub-ambient temperature operation
- Cai Jin
- David J. Frank
- et al.
- 2007
- VLSI-TSA 2007
A 3-transistor DRAM cell with gated diode for enhanced speed and retention time
- Wing K. Luk
- Jin Cai
- et al.
- 2006
- VLSI Circuits 2006
Simulation study on channel length scaling of high performance partially depleted metal gate and poly gate SOI MOSFETs
- Wang Xinlin
- Andres Bryant
- et al.
- 2006
- SISPAD 2006
Stable SRAM cell design for the 32 nm node and beyond
- Leland Chang
- David M. Fried
- et al.
- 2005
- VLSI Technology 2005
2T1D memory cell with voltage gain
- Wing K. Luk
- Robert H. Dennard
- 2004
- VLSI Circuits 2004
Supply voltage strategies for minimizing the power of CMOS processors
- Jin Cai
- Yuan Taur
- et al.
- 2002
- VLSI Technology 2002
Soft error rate scaling for emerging SOI technology options
- P. Oldiges
- K. Bernstein
- et al.
- 2002
- VLSI Technology 2002