Guest Editorial: Special Section on Physical Design Techniques for Advanced Technology Nodes
- Azadeh Davoodi
- Jiang Hu
- et al.
- 2015
- IEEE TCADIS
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18 results for Cliff Sze
Challenges of cell selection algorithms in industrial high performance microprocessor designs
- Tiago J. Reimann
- Cliff Sze
- et al.
- 2016
- Integration, the VLSI Journal
Techniques for scalable and effective routability evaluation
- Yaoguang Wei
- Cliff Sze
- et al.
- 2014
- ACM TODAES
Postgrid clock routing for high performance microprocessor designs
- Haitong Tian
- Wai-Chung Tang
- et al.
- 2012
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design methodology for the IBM POWER7 microprocessor
- Joshua Friedrich
- Ruchir Puri
- et al.
- 2011
- IBM J. Res. Dev
RUMBLE: An incremental timing-driven physical-synthesis optimization algorithm
- David A. Papa
- Tao Luo
- et al.
- 2008
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Path-based buffer insertion
- C.N. Sze
- Charles J. Alpert
- et al.
- 2007
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Techniques for fast physical synthesis
- Charles J. Alpert
- Shrirang K. Karandikar
- et al.
- 2007
- Proceedings of the IEEE