Parallel logic/fault simulation of VLSI array logic
- Pradip Bose
- 1987
- ICCAD 1987
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137 results for Pradip Bose
OPTIMAL CODE GENERATION ALGORITHMS FOR ARITHMETIC EXPRESSIONS EXECUTING ON PIPELINED, DECOUPLED ARCHITECTURES.
- Pradip Bose
- 1985
- ICCD 1985
OPTIMAL CODE GENERATION FOR EXPRESSIONS ON SUPER SCALAR MACHINES.
- Pradip Bose
- 1985
- Fall Joint Computer Conference 1985
Tolerating soft errors in processor cores using CLEAR (cross-layer exploration for architecting resilience)
- Eric Cheng
- Shahrzad Mirkhani
- et al.
- 2018
- IEEE TCADIS
Mitigating Power Contention: A Scheduling Based Approach
- Hiroshi Sasaki
- Alper Buyuktosunoglu
- et al.
- 2017
- IEEE Computer Architecture Letters
Special series on harsh chips
- Augusto Vega
- Alper Buyuktosunoglu
- et al.
- 2014
- IEEE Micro
Guest Editors' Introduction: Power and Complexity Aware Design
- Pradip Bose
- David H. Albonesi
- et al.
- 2003
- IEEE Micro
Challenges in processor modeling and validation
- Pradip Bose
- Thomas M. Conte
- et al.
- 1999
- IEEE Micro
Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms
- Yongmo Park
- Subhankar Pal
- et al.
- 2024
- IEEE Computer Architecture Letters
Reducing Datacenter Compute Carbon Footprint by Harnessing the Power of Specialization: Principles, Metrics, Challenges and Opportunities
- Tamar Eilam
- Pradip Bose
- et al.
- 2024
- IEEE Trans Semicond Manuf