Signal and Power Integrity Design and Analysis for Bunch-of-Wires (BoW) Interface for Chiplet Integration on Advanced PackagingRam KrishnaAtom O. Watanabeet al.2023ECTC 2023
A Methodology to Optimize the Number and Placement of Decoupling Capacitors in a Multilevel Power Delivery NetworkRam KrishnaThong Nguyenet al.2022EDAPS 2022