Ionized-PVD stacked barrier structure of TaN/TaRu for 32nm BEOL integration
- Takeshi Nogami
- Chih-Chao Yang
- et al.
- 2008
- ADMETA 2008
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31 results for C. J. Penny
A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applications
- Matthew Angyal
- Jason Gill
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65nm groundrules
- S. Lane
- M. Fukasawa
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules
- M. Fukasawa
- S. Lane
- et al.
- 2005
- IITC 2005
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- E. Leobandung
- H. Nayakama
- et al.
- 2005
- VLSI Technology 2005
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Lower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
BEOL Cu CMP process evaluation for advanced technology nodes
- Kunaljeet Tanwar
- Donald Canaperi
- et al.
- 2013
- JES
Electrodeposited Cu film morphology on thin PVD Cu seed layers
- James Kelly
- X. Lin
- et al.
- 2013
- JES
Electromigration in Cu(Al) and Cu(Mn) damascene lines
- C.-K. Hu
- J. Ohm
- et al.
- 2012
- Journal of Applied Physics