Power supply noise induced jitter estimation in high speed clock tree for full chip timing analysis
- Wen Yin
- Zegui Pang
- et al.
- 2013
- DesignCon 2013
Publications
Date
Featured collections
Popular topics
2 results for Zegui Pang
Auto-assign method for large scale flip-chip package design
- Haitao Han
- Wen Yin
- et al.
- 2011
- ASICON 2011