Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format
- P. Narayanan
- S. Ambrogio
- et al.
- 2021
- VLSI 2021
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38 results for Nicole Saulnier
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing
- R. Khaddam-Aljameh
- M. Stanisavljevic
- et al.
- 2021
- VLSI Technology 2021
Introduction to Analog Testing of Resistive Random Access Memory (RRAM) Devices towards Scalable Analog Compute Technology for Deep Learning
- Ruturaj Pujari
- Arthur Gasasira
- et al.
- 2021
- ASMC 2021
Resistive Memory Process Optimization for High Resistance Switching Toward Scalable Analog Compute Technology for Deep Learning
- Youngseok Kim
- Soon-Cheon Seo
- et al.
- 2021
- IEEE Electron Device Letters
Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation
- Robert L. Bruce
- Syed Ghazi Sarwat
- et al.
- 2021
- IRPS 2021
Bottom electrode properties and electrical field cycling effects on hfox based resistive switching memory device
- J. Li
- Youngseok Kim
- et al.
- 2020
- ISTFA 2020
Effect of in-situ capping on phase change memory device performance : Aepm: Advance equipment processes and materials
- Kevin Brew
- Richard Conti
- et al.
- 2020
- ASMC 2020
CMP development for Ru liner structures beyond 14nm
- Raghuveer Patlolla
- Koichi Motoyama
- et al.
- 2018
- ECS J. Solid State Sci. Technol.
Design intent optimization at the beyond 7nm node: The intersection of DTCO and EUVL stochastic mitigation techniques
- Michael Crouse
- L. Liebmann
- et al.
- 2017
- SPIE Advanced Lithography 2017
Comprehensive analysis of line-edge and line-width roughness for EUV lithography
- Ravi Bonam
- Chi Chun Liu
- et al.
- 2017
- SPIE Advanced Lithography 2017