High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
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9 results for Christine Ouyang
Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
Gate length and performance scaling of undoped-body extremely thin SOI MOSFETs
- Amlan Majumdar
- Xinlin Wang
- et al.
- 2009
- IEEE Electron Device Letters
FinFET resistance mitigation through design and process optimization
- Cindy Wang
- Josephine Chang
- et al.
- 2009
- VLSI-TSA 2009
Low-k spacers for advanced low power CMOS devices with reduced parasitic capacitances
- Elbert Huang
- Eric Joseph
- et al.
- 2008
- IEEE International SOI Conference 2008
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
- M. Chudzik
- B. Doris
- et al.
- 2007
- VLSI Technology 2007
Lower resistance scaled metal contacts to silicide for advanced CMOS
- A. Topol
- C. Sheraw
- et al.
- 2006
- VLSI Technology 2006
Fully-depleted-collector polysilicon-emitter SiGe-base vertical bipolar transistor on SOI
- Jin Cai
- A. Ajmera
- et al.
- 2002
- VLSI Technology 2002
Effects of substrate orientation and channel stress on short-channel thin SOI MOSFETs
- Amlan Majumdar
- Christine Ouyang
- et al.
- 2010
- IEEE T-ED