Hierarchical Memory System with STT-MRAM and SRAM to Support Transfer and Real-Time Reinforcement Learning in Autonomous Drones
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- et al.
- 2019
- IEEE JESTCS
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Analog-to-Digital Conversion with Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration
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Custom Sub-Systems and Circuits for Deep Learning: Guest Editorial Overview
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- IEEE JESTCS
An In-Memory VLSI Architecture for Convolutional Neural Networks
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Overview of Circuits, Systems, and Applications of Spintronics
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Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias
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- IEEE JESTCS
Circuit-Level Benchmarking of Access Devices for Resistive Nonvolatile Memory Arrays
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- IEEE JESTCS
Recent Progress in Phase-Change Memory Technology
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- IEEE JESTCS
Multilevel-Cell Phase-Change Memory: A Viable Technology
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- 2016
- IEEE JESTCS
Characterizing power and temperature behavior of POWER6-based system
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- IEEE JESTCS