Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault DetectionJacob Savir1980IEEE TC
Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's)Daniel L. OstapkoJune Hong Se1979IEEE TC
The Movement and Permutation of Columns- in Magnetic Bubble Lattice FilesAshok K. ChandraC.K. Wong1979IEEE TC
Associative-Search Bubble Devices for Content-Addressable Memory and Array LogicYoung Lee ShareHsu Chang1979IEEE TC
9-V Algorithm for Test Pattern Generation of Combinational Digital CircuitsCharles W. ChaWilliam E. Donathet al.1978IEEE TC