Wire sizing for non-tree topology
- Zhuo Li
- Ying Zhou
- et al.
- 2007
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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137 results at IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wire sizing for non-tree topology
- Zhuo Li
- Ying Zhou
- et al.
- 2007
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Probabilistic transitive-closure ordering and its application on variational buffer insertion
- Jinjun Xiong
- Lei He
- 2007
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Robust extraction of spatial correlation
- Jinjun Xiong
- Vladimir Zolotov
- et al.
- 2007
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Heterogeneous behavioral hierarchy extensions for SystemC
- Hiren D. Patel
- Sandeep K. Shukla
- et al.
- 2007
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Statistical timing for parametric yield prediction of digital integrated circuits
- Jochen A. G. Jess
- Kerim Kalafala
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Modeling and analysis of leakage currents in double-gate technologies
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
First-order incremental block-based statistical timing analysis
- Chandu Visweswariah
- Kaushik Ravindran
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Minimizing wire length in floorplanning
- Xiaoping Tang
- Ruiqi Tian
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An ECO routing algorithm for eliminating coupling-capacitance violations
- Hua Xiang
- Kai-Yuan Chao
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems