Nikolaos Papandreou  Nikolaos Papandreou photo         

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Research Staff Member
IBM Research - Zurich, Switzerland
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Professional Associations

Professional Associations:  IEEE, Senior Member

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More information:   Google Scholar Citations


2022

Flash Memory Reliability and Error Mitigation in Modern SSDs
N. Papandreou, H. Pozidis
IEEE International Reliability Physics Symposium (IRPS), 2022
Tutorial


2021

High-Throughput ECC with Integrated Chipkill Protection for Nonvolatile Memory Arrays
T. Mittelholzer, M. Stanisavljevic, N. Papandreou, H. Pozidis
IEEE International Symposium on Circuits and Systems (ISCAS), 2021

Circuit and System-Level Aspects of Phase Change Memory
H. Pozidis, N. Papandreou, M. Stanisavljevic
IEEE Transactions on Circuits and Systems II: Express Briefs 68(3), 844 - 850, 2021

Differentially Private Stochastic Coordinate Descent
G. Damaskinos, C. Mendler-Duenner, R. Guerraoui, N. Papandreou, T. Parnell
Thirty-Fifth AAAI Conference on Artificial Intelligence, 2021


2020

Achieving Latency and Reliability Targets with QLC in Enterprise Controllers
R. Pletka, N. Papandreou, R. Stoica, H. Pozidis, N. Ioannou, T. Fisher, A. Fry, K. Ingram, A. Walls
Flash Memory Summit, 2020

Phase Change Memory: Technology Reliability and System-Level Implications
H. Pozidis, N. Papandreou
IEEE International Reliability Physics Symposium (IRPS), 2020
Tutorial

Open Block Characterization and Read Voltage Calibration of 3D QLC NAND Flash
N. Papandreou, H. Pozidis, N. Ioannou, T. Parnell, R. Pletka, M. Stanisavljevic, R. Stoica, S. Tomic, P. Breen, G. Tressler, A. Fry, T. Fisher, A. Walls
IEEE International Reliability Physics Symposium (IRPS), 2020

SnapBoost: A Heterogeneous Boosting Machine
T. Parnell, A. Anghel, M. Lazuka, N. Ioannou, S. Kurella, P. Agarwal, N. Papandreou, H. Pozidis
Neural Information Processing Systems (NeurIPS), 2020

Improving NAND flash performance with read heat separation
R. Pletka, N. Papandreou, R. Stoica, H. Pozidis, N. Ioannou, T.Fisher, A. Fry, K. Ingram, A. Walls
IEEE International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 2020

Differentially Private Stochastic Coordinate Descent
G. Damaskinos, C. Mendler-Duenner, R. Guerraoui, N. Papandreou, T. Parnell
Workshop on Privacy-preserving Machine Learning (PPML) at NeurIPS, 2020


2019

Breadth-first, Depth-next Training of Random Forests
A. Anghel, N. Ioannou, T. Parnell, N. Papandreou, C.Mendler-Duenner, H. Pozidis
Workshop on Systems for ML at NeurIPS, 2019

Reliability of 3D NAND flash memory with a focus on read voltage calibration from a system aspect
N. Papandreou, N. Ioannou, T. Parnell, R. Pletka, M. Stanisavljevic, R. Stoica, S. Tomic, H. Pozidis
19th Non-Volatile Memory Technology Symposium (NVMTS), 2019
(Invited Talk)

Towards data-driven NAND flash controller development
R. Pletka, N. Ioannou, N. Papandreou, R. Stoica, S. Tomic, H. Pozidis
Flash Memory Summit, 2019


Enabling 3D QLC NAND flash
R. Stoica, R. Pletka, N. Papandreou, N. Ioannou, S. Tomic, H. Pozidis
Flash Memory Summit, 2019

A High-Performance System for Robust Stain Normalization of Whole-Slide Images in Histopathology
A. Anghel, M. Stanisavljevic, S. Andani, N. Papandreou, J.-H. Rueschoff, P. Wild, M. Gabrani, H. Pozidis
Frontiers in Medicine, Volume 6, Article 193 (Research Topic: Computational Pathology), 2019

Understanding the design trade-offs of hybrid flash controllers
R. Stoica, R. Pletka, N. Ioannou, N. Papandreou, S. Tomic, H. Pozidis
IEEE International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 2019

Characterization and Analysis of Bit Errors in 3D TLC NAND Flash Memory
N. Papandreou, H. Pozidis, T. Parnell, N. Ioannou, R. Pletka, S. Tomic, P. Breen, G. Tressler, A. Fry, T. Fisher
IEEE International Reliability Physics Symposium (IRPS), 2019

Accelerated ML-assisted Tumor Detection in High-Resolution Histopathology Images
N. Ioannou, M. Stanisavljevic, A. Anghel, N. Papandreou, S. Andani, J.-H. Rueschoff, P. Wild, M. Gabrani, H. Pozidis
International Conference on Medical Image Computing and Computer Assisted Intervention (MICCAI), 2019


2018

Management of Next-Generation NAND Flash to Achieve Enterprise-Level Endurance and Latency Targets
R. Pletka, I. Koltsidas, N. Ioannou, S. Tomic, N. Papandreou, T. Parnell, H. Pozidis, A. Fry, T. Fisher
ACM Transactions on Storage 14(4), 33:1-33:25, 2018

Benchmarking and Optimization of Gradient Boosting Decision Tree Algorithms
A. Anghel, N. Papandreou, T. Parnell, A. De Palma, H. Pozidis
Workshop on Systems for ML and Open Source Software at NeurIPS, 2018

Designing Enterprise Controllers with QLC 3D NAND
R. Pletka, R. Stoica, N. Ioannou, S. Tomic, N. Papandreou, H. Pozidis
Flash Memory Summit, 2018

A Fast and Scalable Pipeline for Stain Normalization of Whole-Slide Images in Histopathology
M. Stanisavljevic, A. Anghel, N. Papandreou, S. Andani, P. Pati, J.-H. Rueschoff, P. Wild, M. Gabrani, H. Pozidis
Bioimage Computing Workshop at ECCV, 2018

Exploiting the non-linear current-voltage characteristics for resistive memory readout
N. Papandreou, A. Sebastian, H. Pozidis
IEEE International Symposium on Circuits and Systems (ISCAS) , 2018
Slides

Drift-invariant detection for multilevel phase-change memory
M. Stanisavljevic, T. Mittelholzer, N. Papandreou, T. Parnell, H. Pozidis
IEEE International Symposium on Circuits and Systems (ISCAS) , 2018


2017

Can Next-Generation 3D TLC NAND Extend Enterprise Applications?
T. Griffin, P. Breen, G. Tressler, N. Papandreou
Flash Memory Summit, 2017

Improving Endurance in 3D-NAND Flash
R. Pletka, I. Koltsidas, N. Ioannou, S. Tomic, N. Papandreou, T. Parnell, H. Pozidis, A. Fry, T. Fisher
Flash Memory Summit, 2017

Temporal correlation detection using computational phase-change memory
A. Sebastian, T. Tuma, N. Papandreou, M. Le Gallo, L. Kull, T. Parnell, E. Eleftheriou
Nature Communications 8(1115), 2017

Neuromorphic architecture with 1M memristive synapses for detection of weakly correlated inputs
S. Wozniak, A. Pantazi, S. Sidler, N. Papandreou, Y. Leblebici, E. Eleftheriou
IEEE Transactions on Circuits and Systems II: Express Briefs, 64(11), pp. 1342-1346, 2017

From random block corruption to privilege escalation: a filesystem attack vector for rowhammer-like attacks
A. Kurmus, N. Ioannou, M. Neugschwandtner, N. Papandreou, T. Parnell
11th USENIX Conference on Offensive Technologies (WOOT), 2017


2016

Phase Change Memory Access in OpenPOWER Systems using CAPI
E. Bougioukou, A. Prodromakis, N. Toulgaridis, T. Antonakopoulos, N. Papandreou, U. Egger, H. Pozidis, E. Eleftheriou
OpenPOWER Summit Europe, Barcelona, 2016

Low Latency Access to Phase Change Memory in OpenPOWER Systems
N. Papandreou, U. Egger, H. Pozidis, E. Eleftheriou, A. Prodromakis, E. Bougioukou, N. Toulgaridis, Th. Antonakopoulos
OpenPOWER Summit, San Jose, CA, 2016

3D NAND Assessment for Next Generation Flash Applications
P. Breen, T. Griffin, N. Papandreou, T. Parnell, G. Tressler
Flash Memory Summit, 2016

Multi-level storage in phase-change memory devices
A. Sebastian, M. Le Gallo, W. Koelmans, N. Papandreou, H. Pozidis, E. Eleftheriou
European Phase Change and Ovonics Symposium (E\PCOS), 2016

Capacity of the MLC NAND Flash Channel
T. Parnell, C. Duenner, T. Mittelholzer, N. Papandreou
IEEE Journal on Selected Areas in Communications, 34(9), pp. 2354-2365, 2016

Improving the error-floor performance of binary half-product codes
T. Mittelholzer, T. Parnell, N. Papandreou, H. Pozidis
International Symposium on Information Theory and Its Applications (ISITA), pp. 295-299, 2016

Controller architecture for low-latency access to phase-change memory in OpenPOWER systems
A. Prodromakis, N. Papandreou, E. Bougioukou, U. Egger, N. Toulgaridis, T. Antonakopoulos, H. Pozidis, E. Eleftheriou
26th International Conference on Field Programmable Logic and Applications (FPL), 2016

Recent progress in phase-change memory technology
G. Burr, M. Brightsky, A.Sebastian, H.-Y. Cheng, J.-Y. Wu, S. Kim, N. Sosa, N. Papandreou, H.-L. Lung, H. Pozidis, E. Eleftheriou, C. Lam
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6(2), pp. 146-162, 2016

Effect of read disturb on incomplete blocks in MLC NAND flash arrays
N. Papandreou, T. Parnell, T. Mittelholzer, H. Pozidis, T. Griffin, G. Tressler, T. Fisher, C. Camp
IEEE International Memory Workshop (IMW), 2016

Demonstration of reliable triple-level-cell (TLC) phase-change memory
M. Stanisavljevic, H. Pozidis, A. Athmanathan, N. Papandreou, T. Mittelholzer, E. Eleftheriou
IEEE International Memory Workshop (IMW), 2016

Multilevel-cell phase-change memory: A viable technology
A. Athmanathan, M. Stanisavljevic, N. Papandreou, H. Pozidis, E. Eleftheriou
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6(1), pp. 87-100, 2016


2015

Holistic Flash Management for Next Generation All-Flash Arrays
R. Pletka, N. Ioannou, I. Koltsidas, N. Papandreou, T. Parnell, H. Pozidis, S. Tomic, A. Fry, T. Fisher
Flash Memory Summit, 2015

Performance of cell-to-cell interference mitigation in 1y-nm MLC flash memory
T. Parnell, N. Papandreou, T. Mittelholzer, H. Pozidis
15th Non-Volatile Memory Technology Symposium (NVMTS), 2015

Accumulation-based computing using phase-change memories with FET access devices
P. Hosseini, A. Sebastian, N. Papandreou, C.D. Wright, H. Bhaskaran
IEEE Electron Device Letters 36(9), 975-977, 2015

Endurance limits of MLC NAND flash
T. Parnell, C. Duenner, T. Mittelholzer, N. Papandreou, H. Pozidis
IEEE International Conference on Communications (ICC), pp. 376-381, 2015

Symmetry-based subproduct codes
T. Mittelholzer, T. Parnell, N. Papandreou, H. Pozidis
IEEE International Symposium on Information Theory (ISIT), pp. 251-255, 2015

Phase change memory reliability: A signal processing and coding perspective
H. Pozidis, T. Mittelholzer, N. Papandreou, T. Parnell, M. Stanisavljevic
IEEE Transactions on Magnetics 51(4), 2015

Modelling of the threshold voltage distributions of sub-20nm NAND flash memory
T. Parnell, N. Papandreou, T. Mittelholzer, H. Pozidis
Non-Volatile Memories Workshop (NVMW), 2015

Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures
M. Stanisavljevic, A. Athmanathan, N. Papandreou, H. Pozidis, E. Eleftheriou
IEEE International Reliability Physics Symposium (IRPS), 2015

Non-resistance metric based read scheme for multi-level PCRAM in 25 nm technology
J. Cheon, I. Lee, C. Ahn, M. Stanisavljevic, A. Athmanathan, N. Papandreou, H. Pozidis, E. Eleftheriou, M. Shin, T. Kim, J.-H. Kang, J.-H. Chun
IEEE Custom Integrated Circuits Conference (CICC), 2015

Enhancing the reliability of MLC NAND flash memory systems by read channel optimization
N. Papandreou, T. Parnell, H. Pozidis, T. Mittelholzer, E. Eleftheriou, C. Camp, T. Griffin, G. Tressler, A. Walls
ACM Transactions on Design Automation of Electronic Systems - Special Issue on Reliable, Resilient, and Robust Design of Circuits and Systems 20(4), 2015


2014

Modelling of the threshold voltage distributions of sub-20nm NAND flash memory
T. Parnell, N. Papandreou, T. Mittelholzer, H. Pozidis
IEEE Global Communications Conference (GLOBECOM), pp. 2351-2356, 2014

Phase change memory: A reliability and system-level perspective
H. Pozidis, T. Mittelholzer, N. Papandreou, T. Parnell, M. Stanisavljevic
25th Magnetic Recording Conference (TMRC), 2014

A 6-bit drift-resilient readout scheme for multi-level phase-change memory
A. Athmanathan, M. Stanisavljevic, J. Cheon, S. Kang, C. Ahn, J. Yoon, M. Shin, T. Kim, N. Papandreou, H. Pozidis, E. Eleftheriou
IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 137-140, 2014

Using adaptive read voltage thresholds to enhance the reliability of MLC NAND flash memory systems
N. Papandreou, T. Parnell, H. Pozidis, T. Mittelholzer, E. Eleftheriou, C. Camp, T. Griffin, G. Tressler, A. Walls
24th Great Lakes Symposium on VLSI (GLSVLSI), pp. 151-156, 2014


2013

Reliable MLC data storage and retention in phase-change memory after endurance cycling
H. Pozidis, N. Papandreou, A. Sebastian, T. Mittelholzer, M. BrightSky, C. Lam, E. Eleftheriou
IEEE International Memory Workshop (IMW), pp. 100-103, 2013

A versatile platform for characterization of solid-state memory channels
N. Papandreou, T. Antonakopoulos, U. Egger, A. Palli, H. Pozidis, E. Eleftheriou
18th International Conference on Digital Signal Processing (DSP), 2013


2012

A framework for reliability assessment in multilevel phase-change memory
H. Pozidis, N. Papandreou, A. Sebastian, T. Mittelholzer, M. BrightSky, C. Lam, E. Eleftheriou
IEEE International Memory Workshop (IMW), pp. 1--4, 2012


2011

Enabling technologies for multilevel phase-change memory
H. Pozidis, N. Papandreou, A. Sebastian, A. Pantazi, T. Mittelholzer, G. Close, E. Eleftheriou
European Phase Change and Ovonics Symposium (E\PCOS), 2011


Drift-resilient cell-state metric for multilevel phase-change memory
N. Papandreou, A. Sebastian, A. Pantazi, M. Breitwisch, C. Lam, H. Pozidis, E. Eleftheriou
IEEE International Electron Devices Meeting (IEDM), 2011

Programming algorithms for multilevel phase-change memory
N. Papandreou, H. Pozidis, A. Pantazi, A. Sebastian, M. Breitwisch, C. Lam, E. Eleftheriou
IEEE International Symposium on Circuits and Systems (ISCAS) , pp. 329-332, 2011

Drift-tolerant multilevel phase-change memory
N. Papandreou, H. Pozidis, T. Mittelholzer, G. Close, M. Breitwisch, C. Lam, E. Eleftheriou
IEEE International Memory Workshop (IMW), 2011


2010

Multilevel phase-change memory
N. Papandreou, A. Pantazi, A. Sebastian, M. Breitwisch, C. Lam, H. Pozidis, E. Eleftheriou
IEEE International Conference on Electronics, Circuits, and Systems (ICECS), pp. 1017-1020, 2010

Estimation of amorphous fraction in multilevel phase-change memory cells
N. Papandreou, A. Pantazi, A. Sebastian, E. Eleftheriou, M. Breitwisch, C. Lam, H. Pozidis
Solid-State Electronics 54(9), 991-996, 2010


2009

Architecture and DSP Implementation of a DVB-S2 Baseband Demodulator
P. Savvopoulos, N. Papandreou, T. Antonakopoulos
EUROMICRO Conference on Digital System Design (DSD), 2009

Estimation of amorphous fraction in multilevel phase change memory cells
N. Papandreou, A. Pantazi, A. Sebastian, E. Eleftheriou, M. Breitwisch, C. Lam, H. Pozidis
European Solid State Device Research Conference (ESSDERC), pp. 209-212, 2009

Multilevel phase-change memory modeling and experimental characterization
A. Pantazi, A. Sebastian, N. Papandreou, M. Breitwisch, C. Lam, H. Pozidis, E. Eleftheriou
European Phase Change and Ovonics Symposium (E\PCOS), pp. 34-41, 2009


2008

A software-radio test-bed for measuring the performance of DVB-S2 receiver circuits
P. Savvopoulos, N. Papandreou, T. Antonakopoulos
10th International Workshop on Signal Processing for Space Communications (SPSC), 2008


Bit and power allocation in constrained multicarrier systems: the single-user case
N. Papandreou, T. Antonakopoulos
EURASIP Journal on Advances in Signal Processing, 2008


2007

A Bandwidth Allocation Algorithm for Multiuser OFDM Systems and its Efficient Implementation
N. Papandreou, T. Antonakopoulos
IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2007

The architecture of a software radio DVB-S2 receiver
P. Savvopoulos, N. Papandreou, T. Antonakopoulos
13th Ka and Broadband Communications Conference, 2007

Fair resource allocation with improved diversity performance for indoor power-line networks
N. Papandreou, T. Antonakopoulos
IEEE Transactions on Power Delivery 22(4), 2575-2576, 2007

Resource allocation management for indoor power-line communications systems
N. Papandreou, T. Antonakopoulos
IEEE Transactions on Power Delivery 22(2), 893-903, 2007


2006

Fair Resource Allocation in Multiuser Indoor Power Line Communications
N. Papandreou, T. Antonakopoulos
IEEE International Symposium on Power Line Communications and Its Applications (ISPLC), 2006


2005

Subchannels allocation on multiple pDSL lines
T. Antonakopoulos, N. Papandreou
IEEE International Symposium on Power Line Communications and Its Applications (ISPLC), 2005

Dynamic bit-loading in pDSL communications systems
N. Papandreou, T. Antonakopoulos
IEEE International Symposium on Power Line Communications and Its Applications (ISPLC), 2005

Far-end crosstalk identification method based on channel training sequences
N. Papandreou, T. Antonakopoulos
IEEE Transactions on Instrumentation and Measurement 54(6), 2204-2212, 2005

A new computationally efficient discrete bit-loading algorithm for DMT applications
N. Papandreou, T. Antonakopoulos
IEEE Transactions on Communications 53(5), 785-789, 2005


2004

Transmission systems prototyping based on Stateflow/Simulink models
N. Papandreou, M. Varsamou, T. Antonakopoulos
IEEE International Workshop on Rapid System Prototyping (RSP), 2004

A new efficient bit-loading algorithm for margin maximization in DMT systems
N. Papandreou, T. Antonakopoulos
IEEE Communication Theory Workshop (CTW), 2004

From protocol models to their implementation: a versatile testing methodology
M. Varsamou, N. Papandreou, T. Antonakopoulos
IEEE Design & Test of Computers 21(5), 416-428, 2004


2003

xDSL systems prototyping using a flexible emulation environment
N. Papandreou, M. Varsamou, T. Antonakopoulos
IEEE International Workshop on Rapid System Prototyping (RSP), 2003

Real-time FEXT crosstalk identification in ADSL systems
N. Papandreou, T. Antonakopoulos
IEEE International Symposium on Intelligent Signal Processing, 2003

Cooperative bit-loading and fairness bandwidth allocation in ADSL systems
N. Papandreou, T. Antonakopoulos
IEEE International Symposium on Circuits and Systems (ISCAS), 2003




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