PaperAn experimental memory cell using edge-junction gatesU. Deutsch, T.V. Rajeevakumar, et al.IEEE Transactions on Magnetics
Conference paperBuried-trench DRAM cell using a self-aligned epitaxy over trench technologyN.C.-C. Lu, T.V. Rajeevakumar, et al.IEDM 1988
PaperA 22-ns 1-Mbit CMOS High-Speed DRAM with Address MultiplexingNicky C.C. Lu, Gary B. Bronner, et al.IEEE Journal of Solid-State Circuits