Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
The fundamental ballistic limits of on-state current in ultimately scaled Si MOSFETs are examined. Theoretical analysis of these limits, with comparisons to currents that have actually been achieved in recent CMOS technologies and that have been predicted by Monte Carlo simulations, gives insight about why the limits have not been reached and how they might be reached. The study considers SOI as well as bulk-Si devices, and suggests that, for controlled off-state current, only an optimally designed double-gate structure could yield a ballistic-limit on-state current. © 2003 Elsevier Science Ltd. All rights reserved.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
M.A. Lutz, R.M. Feenstra, et al.
Surface Science
Surendra B. Anantharaman, Joachim Kohlbrecher, et al.
MRS Fall Meeting 2020
K.A. Chao
Physical Review B